The present invention relates to circuits utilizing the Josephson effect and, more particularly, to such a logic gate which has a very short gate delay time and wide operational margins and is feasible for a high degree of integration.
Various kinds of logic gates of the type described have been proposed to take advantage of a low power dissipation and high switching speeds of the Josephson junction. For example, refer to the paper "Josephson-Logic Devices and Circuits", by TUSHAR R. GHEEWALA, IEEE TRANSACTIONS OF ELECTRON DEVICES, vol. ed-27, No. 10, Octber 1980, pp. 1857-1869. These logic gates may generally be classified into two types, the interference type and the current injection type. In the interference type logic gate, a gate current is fed through a loop circuit which is made up of a plurality of Josephson junctions and inductances for electrically coupling the Josephson junctions. The critical value of the gate current is controlled by an input current which is magnetically coupled with the loop circuit, so that the loop circuit is switched from the zero voltage state to the voltage state to inject an output current into an output line which is connected with a gate current path of the loop circuit. An example of such a circuit is described in the paper "Josephson Logic Circuits Based on Nonlinear Current Injection in Interferometer Devices" by T. R. Gheewala, Applied Physics Letter, Vol. 33, No. 8, pp. 781-783. In such interference type logic gates, however, a larger chip area is required to attain the low power dissipation. Because the product of the inductances and the critical currents of the Josephson junctions is limited to a certain value which depends on the magnetic flux quantum .phi..sub.0, nevertheless the critical current levels of the Josephson junctions should be small for reduction of the power dissipation. The logic gate contains both the inductance and the Josephson junction capacitance and, therefore, resonance is unavoidable which should be damped for higher switching speeds. Additionally, such a gate tends to trap stray magnetic flux when switched to the superconducting state, resulting in malfunctions.
A current injection type logic gate is proposed in U.S. Pat. No. 4,275,314 which is not provided with any inductance component to overcome the problems discussed above. A switching gate is shown in FIG. 6 of the specification of the U.S. Patent. The switching gate employs the so-called "JAWS (Josephson-AttoWeber Switch)" as its basic construction. First and second Josephson junctions are connected with a first resistor r to form a loop. A third Josephson junction is connected through a second resistor r' to the node between the first and second Josephson junctions. A first bias current I.sub.b is coupled to this node. A load resistor R is connected with the node between the second resistor r' and the third Josephson junction, while a second bias current I.sub.b3 is coupled to this node. An input current is injected into the node between the second Josephson junction and the first resistor r. This circuit, though favorable from the margins and fanout standpoint, causes some problems. Concerning the resistors R, r and r', there must hold a relation R&gt;&gt;r in order to prevent backlash of the current when the logic gates are cascaded, and a condition r&gt;&gt;r' to facilitate transition of the third Josephson junction to the voltage state (to supply a larger amount of current I.sub.b to the third Josephson junction). However, the load resistor R is usually provided with a resistance within the range of about 5-10 .OMEGA. in consideration of its impedance matching with the characteristic impedance of a superconducting transmission line fabricated using conventional lithography techniques with minimum feature size of 2-5.mu. (function of the geometric parameters of the transmission line). Considering, then, the required conditions stated above, at least the resistor r should be selected to have a resistance lying in the range of about 0.5-1.OMEGA. and the resistor r' in the range of about 0.05-0.1 .OMEGA.. Setting up such a small resistance is quite difficult due to the limitations on production techniques (lithography in particular) and because the effect of the contact resistance can not be neglected. It is, therefore, difficult to accurately control the resistances inasmuch as the distribution of currents coming out from the Josephson junctions must be taken into consideration. Furthermore, the two gate currents required for the logic gate render the design of a power supply system difficult.